A variety of circuits for the conversion of a digital word into an analog voltage are known. A digital-to-analog converter (DAC) typically employs a constant impedance resistor string or a binary-weighted resistor array to accomplish the conversion. A constant impedance resistor string is comprised of 2.sup.N series-connected resistors, where N equals the number of bit of the digital word to be converted. A voltage reference is placed across the string to thereby generate a series of monotonically increasing voltages. The value of the digital word determines which one of these voltages is selected as the analog output.
Binary-weighted resistor arrays require fewer resistors for a specified number of bits (2N versus 2.sup.N) and one common array is the "R-2R" ladder 10 illustrated in FIG. 1. The R-2R ladder is comprised of a "runner" of series-connected resistors 2, each having a resistance of R ohms, and a, plurality of "rungs," one for each binary bit of the digital word. A rung includes a resistor 4 of 2R ohms and a switch 6 that is controlled by its associated binary bit signal. A voltage reference, V.sub.ref, is placed across the R-2R ladder producing binary-weighted currents that are typically summed and converted into an output voltage by an operational amplifier 8.
Unlike the constant impedance resistor string, a binary-weighted resistor array is not an inherently monotonic structure wherein the analog output voltage is guaranteed to monotonically increase as the value of the digital word increases. To avoid the output noise caused by non-monotonic performance, the array resistors must be tightly matched. For example, the resistor matching for the i.sub.th bit of an n-bit converter should be within R/(2.sup.n-i) ohms.
Both the constant impedance resistor string, due to the large number of resistors required, and the binary-weighted array, due to the difficulty in matching the array resistors, are effectively limited in the number of bits that they can convert. To convert digital words having a large number of binary bits, some digital-to-analog converters divide the digital word into a most significant bit (MSB) segment and a least significant bit (LSB) segment and process each segment separately. A segmented DAC structure, described in U.S. Pat. No. 5,648,780, is illustrated in FIG. 2. A first divider stage 20 is responsive to the MSB segment and employs a constant impedance resistor string 22 to generate a series of reference voltages. A decoder 26 generates a plurality of switch control signals 27 to control the switch pairs of a switch string 24 and thereby select, based on the binary value of the MSB segment, an upper-level voltage reference and lower-level voltage reference appearing at a pair of output nodes 28, 29.
A second, last divider stage 30 employs a binary-weighted resistor ladder 32 to produce a voltage at an output node 38. The output voltage depends upon both the established voltage reference range placed across the ladder 32 and the binary value of the LSB segment which controls a plurality of switches 34. If the digital word to be converted is very large, one or more additional divider stages (not shown) may be placed between the first and last divider stages for the bits of the intermediate segments of the digital word.
To achieve the smallest possible package size, a DAC is commonly implemented as a monolithic integrated circuit. Typically, metal oxide semiconductor field effect transistor (MOSFET) devices are used for switches and diffused or implanted structures are used for the resistors. Unfortunately, a monolithic DAC still tends to be relatively large because the switch and resistive devices consume a significant amount of die space. The continued miniaturization of electronic equipment has resulted in a need for an even more compact monolithic DAC.